Communication systems for business and personal use that transmit data at very high rates of speed are desirable. Data can be serially transmitted as a bit stream, which is a sequence of bits, e.g., logic level 1s and 0s, or as a stream of other symbols, e.g., multilevel pulse amplitude modulation (PAM), to represent information to be communicated. In these systems, a receiver extracts the transmitted data by accurately decoding the bit stream. Capacitive coupling and high pass filtering aide in accurate decoding by blocking undesirable low-frequency signals, including direct current (DC) signals, for instance noise on a transmission line. For accurate decoding, the high or low voltage levels associated with bits in the bit stream should generally stay the same.
However, in some circumstances, for example when the data contains multiple 0s or multiple 1s over a time period that approaches or exceeds the RC time constant of the high pass filter, low-frequency signal content, also referred to herein as low-frequency components, of the input signal are filtered and lost from the signal prior to providing the signal to the receiver input. This loss of low-frequency content causes a distortion of the high frequency content of the input signal due at least in part to an imbalance of charge on the coupling capacitor, such that the voltage values associated with either high or low voltage signals vary. This variation, sometimes referred to as baseline wander, adversely affects data recovery and increases bit error rates.
Some conventional approaches compensate for baseline wander using circuitry, such as gathering multiple bits to provide a composite signal, which adds latency. Other conventional approaches compensate for baseline wander using circuitry that operates on the signal coming directly from the receiver. Using the receiver output signal proves difficult under some circumstances because the signal can contain distortion, such as pulse width distortion, hence the correction signal is tightly coupled to the duty cycle of the input data. Additionally, the circuitry that uses the receiver output signal operates at the rate of the input data, which make the solution impractical as data rates of communicated signals continue to increase.